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| REFERENCE DESIGN Overview This reference design is capable of delivering up to a current of 160A with the enclosed heatsink attached at an ambient temperature of 60C with 400LFM or an ambient temperature of 45C with 200LFM of airflow. Performance graphs and waveforms are provided in figures 1-9. The figures and table in pages 5 - 8 are provided as a reference design to enable engineers to very quickly and easily design a 4-phase converter. Refer to the data sheet for the controller listed in the bill of materials in order to optimize this design to your specific requirements. A variety of other controllers may also be used, but the design will require layout and control circuit modifications. IRDCIP2003A-C International Rectifier * 233 Kansas Street, El Segundo, CA 90245 USA IRDCIP2003A-C: 1MHz, 160A, Synchronous Buck Converter Using iP2003A Demoboard Quick Start Guide Initial Settings: The output is set to 1.3V, but can be adjusted from 0.8V to 3.3V by changing the voltage divider values of R3 and R32 according to the following formula: R3 = R32 = (24.9k x 0.8) / (VOUT - 0.8) The switching frequency per phase is set to 1MHz with the frequency set resistor R4. This creates an effective output frequency of 4MHz. The graph in figure 11 shows the relationship between R4 and the switching frequency per phase. The frequency may be adjusted by changing R4 as indicated; however, extreme changes from the 1MHz set point may require redesigning the control loop and adjusting the values of input and output capacitors. Refer to the SOA graph in the iP2003A datasheet for maximum operating current at different conditions. Procedure for Connecting and Powering Up Demoboard: 1. Apply input voltage across (+12V) across VIN and PGND. 2. Apply load across VOUT pads and PGND pads. 3. Adjust load to desired level. See recommendations below. IRDCIP2003A-C Recommended Operating Conditions (refer to the iP2003A datasheet for maximum operating conditions) 1 Input voltage: 5V - 12V Output voltage: 0.8 - 3.3V Switching Freq: 1MHz per phase, 4MHz effective output frequency. Output current: This reference design is capable of delivering up to 160A with the enclosed heatsink attached, at an ambient temperature of 60C with 400LFM of airflow, or an ambient temperature of 45C with 200LFM of airflow. 1 Note: If Vin = 5V, then connect Vin to test point TP3 and Terminal T1 and remove jumper J1. Refer to schematic for details. Additionally, the threshold of the POR circuit should be adjusted to allow the supply to sequence properly. 12/03/04 IRDCIP2003A-C_ ____ 55.0 _____ 86% 85% 84% 83% 82% 81% 80% 50.0 45.0 40.0 35.0 Power Loss (W) VIN = 12V VOUT = 1.3V fSW = 1MHz TA = 25C Efficiency (%) 30.0 79% 78% 77% 76% 75% 25.0 20.0 15.0 74% 73% 72% 10.0 VIN = 12V VOUT = 1.3V fSW = 1MHz TA = 25C 0 20 40 60 80 Output Current (A) 100 120 140 160 5.0 71% 70% 0 20 40 60 80 Output Current (A) 100 120 140 160 0.0 Fig. 1: Power Loss vs. Current Fig. 2: Efficiency vs. Current Phase Margin = 61 Cross-Over Freq. = 106kHz VIN = 12V VOUT = 1.3V IOUT = 160A fSW = 1MHz TA = 25C Fig. 3: Bode Plot VIN = 12V, VOUT = 1.3V IOUT = 160A, fSW = 1MHz TA = 25C VIN = 12V, VOUT = 1.3V IOUT = 160A, fSW = 1MHz TA = 25C Ripple = 90mVp-p Ripple = 7.0mVp-p Fig. 4: Input Voltage Ripple Waveform Fig. 5: Output Voltage Ripple Waveform www.irf.com 2 _____________ 100.0% 99.8% 99.6% Output Voltage Accuracy (%) 99.4% 99.2% 99.0% 98.8% 98.6% 98.4% 98.2% 98.0% 0 20 40 60 80 Output Current (A) __IRDCIP2003A-C VIN = 12V VOUT = 1.3V fSW = 1MHz TA = 25C 100 120 140 160 Fig. 6: Output Voltage Accuracy vs. Current VIN = 12V VOUT = 1.3V IOUT = 160A fSW = 1MHz TA = 25C Ch. 1: VIN 2V/div Ch. 1: VIN 2V/div VIN = 12V VOUT = 1.3V IOUT = 160A fSW = 1MHz TA = 25C Ch. 2: VOUT 0.5V/div Ch. 2: VOUT 0.5V/div Fig. 7: Power Up Waveform Fig. 8: Power Down Waveform Ch. 1: VOUT 1V/div VIN = 12V VOUT = 1.3V fSW = 1MHz TA = 25C Hiccups until short circuit is removed Short circuit at start-up Ch. 2: IOUT 50A/div Fig. 9: Short Circuit Condition Waveform 3 www.irf.com IRDCIP2003A-C_ ____ *>120.0C 120.0 100.0 80.0 60.0 40.0 Airflow direction VIN = 12V VOUT = 1.3V IOUT = 160A fSW = 1MHz TA = 45C Airflow = 200LFM Max 70.7C _____ Board Temperature @ 1mm from edge of module: TPCB (U2): TPCB (U3): TPCB (U4): TPCB (U5): 83.4C 82.7C 82.3C 79.2C *<21.3C *>120.0C 120.0 100.0 80.0 60.0 40.0 VIN = 12V VOUT = 1.3V IOUT = 160A fSW = 1MHz TA = 60C Airflow = 400LFM Max 78.5C Board Temperature @ 1mm from edge of module: TPCB (U2): 88.9C TPCB (U3): 87.5C TPCB (U4): 87.3C TPCB (U5): 85.1C Airflow direction *<21.3C Fig. 10: Thermal Images With Board and Heatsink Temperatures www.irf.com 4 _____________ Adjusting the Over-Current Limit __IRDCIP2003A-C R5, R7, R8, and R9 are the resistors used to adjust the over-current trip point. The trip point is a function of the controller and corresponds to the per phase output current indicated on the x-axis of Fig. 11. For example, selecting 3.65k resistors will set the trip point of each phase to 66A. (Note: Fig. 11 is based on iP2003A, TJ = 125C. The trip point will be higher than expected if the reference board is cool and is being used for short circuit testing.) 3.7 3.6 3.5 3.4 3.3 3.2 RISEN (k) 3.1 3.0 2.9 2.8 2.7 2.6 2.5 2.4 43 45 47 49 51 53 55 57 59 61 63 65 67 Over-Current Trip Point (per Phase) Fig. 11: RISEN vs. Current (per Phase) 100 R4 (k) 10 100 1000 Output Frequency (kHz) (per Phase) Fig. 12: R4 vs. Frequency (per Phase) 5 www.irf.com IRDCIP2003A-C_ ____ _____ Fig. 13: Component Placement Top Layer Heatsink Notes: 1) 2) 3) 4) Always use the supplied Berquist Gap PadTM A3000 thermal interface material with heatsink. Torque 5 x #2-56 machine screws to 15 +/-1 in-oz. The heatsink is optimized for 400 LFM with unconfined airflow. Performance will improve with more airflow or confined airflow. Airflow direction should be parallel to fins for maximum performance. Fig. 14: Heatsink Specification www.irf.com 6 R35 0 499 1% 20k1% R6 +5V 1 VDD VIN 8 U2 IP2003A R1 T P13 Vin VINS VOUTS R2 24.9k1% 220pF 15pF 560pF C26 C25 R22 2.2uF 2.2uF 10uF 10uF 10uF 10uF open C1 +5V T 1 VIN C48 C39 330uF C49 C3 open C4 C5 C56 C33 C57 C40 T P1 A open 40.2k1% B T P2 PWM R3 R19 4 3 +5V VCC 1 VSW 3.65k1% 10k1% R36 open 3 330uF C41 330uF T 2 PGND 5 ENA 6 VSW1 2 ENABLE T P17 R5 T P6 VSW1 PGNDS FB COMP DROOP C2 VSWS1 VSWS2 10uF L1 0.3uH VOUT T 3 VOUT PRDY1 4 PRDY PGND PGND 5 7 9 10 100uF 100uF 100uF open ISEN1 14 C15 C16 C42 C64 T 4 VOUT T 5 VOUT R31 24.9k1% PWM1 6 VSEN U3 IP2003A 13 0 _____________ R10 R32 C47 open 40.2k1% ISEN2 +5V VDD VIN 8 1 11 +5V T 6 Vin PGND T 7 C50 2.2uF 2.2uF 10uF 10uF R24 D1 PRDY3 3 CMPD3003A 0 C51 C6 C7 C8 10uF C30 10uF C58 open C59 open PGND PWM2 3 PWM 12 R11 open T 8 PGND TP5 1 PGOOD R16 2 PGOOD ISEN3 10 VSW 6 10k1% 0.22uF C35 PRDY2 2 VSW2 ENA 2 ENABLE TP7 R7 3.65k1% VSW2 0.22uF C36 +5V VSWS1 FS/EN PWM3 9 9 R30 R12 R29 10 +5V open 0 L2 0.3uH VOUTS VOUTS TP21 VSWS2 100uF 100uF 100uF PRDY1 3 1 PWM4 16 2 0 0.22uF CMPD3003A 20k1% open 2.2uF 2.2uF 10uF 10uF 10uF 10uF open PWM R17 10k1% ENA 2 ENABLE VSW 6 open VSWS1 VSWS2 9 10 100uF 100uF 100uF U6 R40 R38 26.1k1% 301 LM1117DTX -5.0 1 2 1 3 +5V 110k1% Input Output 2 Jum per 3 2 2.2uF 2.2uF 10uF 10uF 10uF 10uF open 1 TP4 PGND 11k1% R39 PWM R18 10k1% ENA 2 ENABLE VSW 6 open 10uF 10uF Adj/Gnd VSWS1 VSWS2 9 10 100uF 100uF 100uF __IRDCIP2003A-C www.irf.com open Fig. 15: Reference Design Schematic 7 open Vin +5V Q1 IRLML6402 +5V ENA +5V 1 U5 IP2003A Vin J1 TP3 R37 ENA 3 LM431 +5V VDD VIN 8 Vin D3 R41 1k1% R28 open C54 3 C55 C12 C13 C14 C32 C62 C63 C27 C28 VSW4 3.65k1% R9 TP9 VSW4 L4 PRDY4 4 PRDY PGND PGND 5 7 0.3uH C21 C22 C45 C67 open 7 PRDY2 4 PRDY PGND PGND 5 7 C17 C18 C43 C65 C34 0.1uF C46 10uF R4 PGNDS TP22 R13 PGNDS 0.22uF C37 PRDY4 C38 8 GND +5V VDD 1 ISEN4 15 +5V U4 IP2003A D2 8 VIN Vin U1 ISL6558CB R26 open C52 3 C53 C9 C10 C11 C31 C60 C61 VSW3 3.65k1% R8 TP8 VSW3 L3 4 PRDY PGND PGND 5 7 0.3uH PRDY3 C19 C20 C44 C66 IRDCIP2003A-C_ ____ _____ Table 1: Reference Design Bill of Materials Refer to the following application notes for detailed guidelines and suggestions when implementing iPOWIR Technology products: AN-1028: Recommended Design, Integration and Rework Guidelines for International Rectifier's iPowIR Technology BGA and LGA and Packages This paper discusses optimization of the layout design for mounting iPowIR BGA and LGA packages on printed circuit boards, accounting for thermal and electrical performance and assembly considerations. Topics discussed includes PCB layout placement, and via interconnect suggestions, as well as soldering, pick and place, reflow, inspection, cleaning and reworking recommendations. AN-1030: Applying iPOWIR Products in Your Thermal Environment This paper explains how to use the Power Loss and SOA curves in the data sheet to validate if the operating conditions and thermal environment are within the Safe Operating Area of the iPOWIR product. AN-1047: Graphical solution for two branch heatsinking Safe Operating Area Detailed explanation of the dual axis SOA graph and how it is derived. Use of this design for any application should be fully verified by the customer. International Rectifier cannot guarantee suitability for your applications, and is not liable for any result of usage for such applications including, without limitation, personal or property damage or violation of third party intellectual property rights. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 www.irf.com 8 |
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